Multi-gate structures are known in the art and are increasingly employed because of the advantageous features of scalability, drive current improvement, and switching speed, among others. Double gate transistors, triple gate transistors, omega transistors, and fin-FET transistors are among the multi-gate structures that have been proposed and that are finding increased acceptance.
Typically, multi-gate structures are formed on a so-called silicon on insulator (SOI) substrate. This is because multi-gate transistors are generally formed on mesa or island structures. These mesas or islands are preferably highly electrically isolated to prevent noise and cross talk, and the SOI substrate readily lends itself to this process.
Recently, a so-called body-tied multi-gate structure has been proposed by Park et al., Fabrication of Body-Tied FinFETs (Omega MOSFETs) Using Bulk Si Wafers, 2003 Symposium on VLSI Technology Digest of Technical Papers, which article is incorporated herein by reference. Park et al. describe a multi-gate structure that is formed on a bulk silicon wafer. Advantageously, bulk wafer processing provides cost savings over the more expensive SOI wafers. Additionally, tying the transistor body to the bulk substrate also provides improved thermal dissipation and improved grounding and, hence, improved noise reduction.
While the prior art devices show improvement over planar transistors, further improvement in device performance is still needed. One such improvement is described herein.